PERFORMANCE ANALYSIS

MAXIMUM CLOCK FREQUENCY

The maximum clock frequency our chip would operate at was determined by using IRSIM. Using a command file which performed all the operations of the chip, we decreased the stepsize until one of the functions failed. We found that the chip performed subtraction incorrectly at 12.5 MHz. At 11.9 MHz, the chip performed all operations correctly.

CRYSTAL ANALYSIS OF LONGEST PATH

The longest path through the chip was found by designating a set of delays using crystal, and then using the critical command. Since for all operations, all three units, the add/subtract unit, the and/or unit, and the shifter, are used, we suspect that the critical path would be the about same for all operations, and that it would be through the add/subtract unit. Surely enough, as the attached crystal files show, the critical path is from the inputs through the add/sub unit to OUT3. The time for the critical path is 81.8ns.

SPICE ANALYSIS

We were unable to obtain any results from a Spice analysis. We were unable to perform a Spice analysis in a manner similar to the homework assignment. We attempted the run SPICE on the ADD/SUB Unit toggling the CARRY IN bit (instr_alu0). There were errors that we did not understand, and we went to Chaitali for help, but she had gone home already.

While we do not have any results, we hypothesize that the Spice analysis will confirm what both the Crystal and Maximum Frequency analysis suggest. It will show that the longest path comes from the add/sub unit and occurs on a subtract instruction.