-- Group GAMMA
-- Controller PLA
--

INPUTS: RESTART RUN OP0 OP1 OP2 OP3;
OUTPUTS: CLRPC INCPC WRPC RDMEM WRMEM ADDRCTRL WRIR0 WRIR1 ENADD ENAND ENOR ENINV ENBARREL ENMEMLD ENMEMST ENBR WRWB WRREG;


RESET ON RESTART TO idle (CLRPC) ;

idle :	case ( RUN )
		1	=> if_1 (INCPC WRPC RDMEM WRIR0 );
		endcase => idle;

if_0 :	case ( OP0 OP1 )
		1   1	=> if_1	(INCPC WRPC RDMEM WRIR0);
		endcase	=> if_1 (INCPC WRPC RDMEM WRIR0 WRREG);

if_1 :	goto ex	(RDMEM WRIR1);

ex   :	case ( OP0 OP1 OP2 OP3 )
		0   0	0   ?	=> if_0 (ENAND WRWB INCPC WRPC);
		0   0   1   ?	=> if_0 (ENOR WRWB INCPC WRPC);
		0   1   0   ?	=> if_0 (ENINV WRWB INCPC WRPC);
		0   1   1   ?	=> if_0 (ENBARREL WRWB INCPC WRPC);
		1   0   0   ?	=> if_0 (ENADD WRWB INCPC WRPC);
		1   0   1   ?	=> if_0 (ENMEMLD RDMEM ADDRCTRL WRWB INCPC WRPC);
		1   1   0   ?	=> if_0 (ENMEMST WRMEM ADDRCTRL INCPC WRPC);
		1   1   1   0	=> if_0 (ENBR WRPC);
		endcase		=> idle (INCPC WRPC);