This page contains links to all of the sections of our report:
Functional Description
Overview
Algorithm Summary
Pin-Map
Specifications
Circuit Design
Logic Diagrams
System Timing
Irsim Results of Subcells
Irsim Results of Full Chip
PLA Description
Overview
State Diagram & Meg Input
Irsim Simulation
Circuit Layout
Subcell Layout
Cell Hierarchy
Floorplan
Full Plot of Chip
Performance Analysis
HSPICE Analysis of Basic Cells
Critical Path Timing Analysis