Introduction
This page contains links to the plots of the results of IRSIM simulations on each circuit in our system. Links to both the IRSIM plot and command file are listed as well as links to pages containing images of the layout, IRSIM, and HSPICE simulations.
Leaf Cells (Transmission Gate, NAND, etc)
Sub-Blocks (Multiplexer subcells, 4-bit adder, etc.)
Intermediate Blocks (12-bit adder, 8-bit Multiplier, PLA, etc.)
| Cell | IRSIM Plot (.ps) | Command File |
| Transmission Gate | N/A | N/A |
| Inverter | |
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| NOR | |
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| XOR | |
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| NAND2 | |
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| NAND3 | |
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| NAND4 | |
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| NAND5 | |
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| Latch | |
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| Clearable Latch | |
|
| Cell | IRSIM Plot (.ps) | Command File |
| 2x1 Multiplexer Subcell |
|
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| 4-bit Carry Lookahead Adder |
|
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| Cell | IRSIM Plot (.ps) | Command File |
| 8-bit Rotate Stack |
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| 8-bit Carry Lookahead Adder |
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| 12-bit Carry Lookahead Adder |
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| 8-bit Radix-4 Booth Recoding Multiplier |
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| Control PLA |
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