ALU

Subcells are listed below.

Irsim tests were performed for every possible combination of inputs for every possible opcode. The following is a summary of these results (postscript):

• ADD (page 1, page 2)
• SUB (page 1, page 2)
• SLL (page 1, page 2)
• NOT (page 1)
• AND (page 1, page 2)
• OR (page 1)

Subcells:

• 2-input, 4-bit mux (2mux4bus)
• 2-to-4 decoder (2to4_decoder)
• 4-bit Shift Register (4b_shift_contacts)
• Manchester Adder (4b_man)
• 4-bit Transmission Gate (4b_decoded_tgate)
• 4-bit Transmission Gate (4b_tgate)
• 2-input NOR, 4-bits (2nor_4bits)
• 2-input NAND, 4-bits (2nand_4bits)
• 4-bit Inverter (invert_4bits)
• Inverter (invert)