Summary - JAWs CPU

Distribution	Jameson, Neal	Anderson, Anita	Wakin, Mike
Basic Functional Units: (Design/Testing)
Combinational Logic:	.	.	.
Latches, Multiplexers:	.	.	.
Manchester Adder	.	.	.
Barrel Shifter:	.	.	.
Primary CPU Blocks:
Register File Design & Testing:	.	.	.
ALU Assembly & Testing:	.	.	.
PLA MEG Generation & Testing:	.	.	.
PC Increment Unit Design & Testing:	.	.	.
Overall Project Components:
CPU Layout & Routing	.	.	.
CPU Performance Analysis:	.	.	.
Functional Verification:	.	.	.
Timing Analysis:	.	.	.
Web Design / Shark Cell:	.	.	.
Project Report / Presentation:	.	.	.

We feel that the division of work among our group members was quite fair and that everyone contributed equally to the project.

A magic model of the external memory device would have been extremely useful for testing our chip. A model would have made it much easier to find problems with instructions dealing with memory. We feel that we have verified the interaction between the memory and our CPU as well as humanly possible. However, a memory module to use in simulation would have given us a more firm belief that our interface was correct.
Crystal testing was difficult, as it would often get confused and would provide very little information about its longest path. Also, it would have been nice to have a standard parameter set of 1.2u for all simulation tools.