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3.3  irsim Results of Entire Chip

Warning: this is long and boring - there are 22 irsim pictures on this page.

First, the chip has to be reset. Unfortunately, I forgot to include the reset pin in the ana statement. The controller begins by resetting the counters and registers that it needs, then waits for randomness to accumulate in the random shift register, which just shifts in the value of the rand_pin every cycle.

In state 0a, the 8 bits in the random shift register are written into a column of the register file. There are 16 columns, so this goes on for a while.





Still initializing...




In the middle of this next shot, the last column is initialized, and the controller shifts into expression evaluation mode. The address pins show data and begin counting. Normally this would begin the interaction with the external SRAM, but irsim doesn't do that, so we simulate it be feeding it the data from the .cmd file.


Several frames of reading the expression in from memory...

Here the expression goes to all ones ("ff"), which is the termination signal.

After seeing this value three times, the controller goes through a few states considering these results. The expression was not satisfied with the initial assignment to the variables, so a variable gets flipped and the evaluation begins again.


Here's the termination clause again.

This time the expression was satisfied, so the controller goes into state 2a and asserts "finish_pad" to indicate that it has succeeded.

For some reason, we wait a bunch of cycles. This shouldn't be necessary. It's tricky to get these command files right.

Once we're done waiting, we start putting register file addresses on the data pins to read the final values out (on out_pad). Note that this is a purely combinational operation - you can read values out independent of the clock.

We could have read the whole thing out, but that would take too long. We settle for the first few, followed by just the interesting values (the ones referred to by the expression).

And done.

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