NCSU CDK User FAQ: Super Quick Start Instructions


Topics:


Creating a New Library

  1. Choose ``File->New->Library...'' from the CIW (the main status window) or from the Library Manager. (Note that the Library Manager menu customization is only available for versions 4.4.2.100.22 and higher. We have 4.4.5.100.10 at N.C. State; Cadence should tell you when you start what version you have. If you see ``Loading NCSU Library Manager customizations...done'' in the ``Messages'' field of the Library Manager immediately after starting Cadence, you can use ``File->New->Library...'' from the Library Manager.)
  2. Fill in a name for your library (e.g. myLib) and the directory that it's going to reside in (e.g. ~/cadence). Note that the path you specify must already exist. If you don't specify a path, the current directory is used.
  3. Click ``Attach to existing tech file'', and choose the technology you want to use. (Note that the lengths given are drawn lengths, so e.g. the TSMC 0.25um process is listed as "TSMC 0.3u CMOS025 (5M, HV FET)").
  4. Click ``OK'', and the new library will show up in the Library Manager along with the ``technology library'' it's linked to.


Creating a schematic

  1. In the Library Manager, click on the name of the library in which you want to create the schematic. It should highlight.
  2. In the ``Cell'' field of the Library Manager, type a name for the new schematic (e.g. ``inv'') and hit Return.
  3. In the form that pops up, choose ``Composer-Schematic'' as the ``Tool''. It should put ``schematic'' in the ``View Name'' field. Click ``OK''.
  4. When the schematic window appears, use ``Add->Component'' to instantiate components from NCSU_Analog_Parts or NCSU_Digital_Parts. (Of course, you can also use parts from your own libraries, but you need to make ``symbol'' views for your parts first. The easiest way to do this is to create your schematic, and then choose ``Design->Create Cellview->From Cellview...'' in the schematic editor.)
  5. Choose ``Design->Check and Save'' when you're done.


Creating a layout

  1. In the Library Manager, click on the name of the library in which you want to create the layout. It should highlight.
  2. In the ``Cell'' field of the Library Manager, type a name for the new layout (e.g. ``inv'') and hit Return.
  3. In the form that pops up, choose ``Virtuoso'' as the ``Tool''. It should put ``layout'' in the ``View Name'' field. Click ``OK''.
  4. When the layout window appears, choose the drawing layer in the LSW (which should appear automatically), draw rectangles with the r command and paths with the p command. The easiest way to draw individual transistors and contacts is to instantiate pcells with the i command.
  5. Menu entries to run DRC, extraction and LVS are under the ``Verify'' menu.
  6. Choose ``Design->Save'' when you're done.


Circuit Simulation (SPICE, HSPICE, Spectre)

  1. Choose ``Tools->Analog Artist'' in the schematic/extracted view window.
  2. For simulating digital circuits, you can use BitGen to create your stimuli.

More information on Analog Artist is in Openbook.


Digital Simulation (Verilog-XL)

  1. Choose ``Tools->Simulation->Verilog-XL'' in the schematic editor window.

More information on Verilog-XL is in Openbook.


The NCSU CDK is © NC State University, 1998-2000. Users are free to use or modify the NCSU CDK as appropriate as long as this notice appears in it. You are also advised that you use the NCSU CDK at your own risk. By using the NCSU CDK, you assume all liability for any resulting errors and problems.