Brandon and Patrick's Project

Saturday
04/20/2024

Index
Introduction
Abstract
Background
Procedure
Design Details
Finite Register Effects
Data Analysis
Conclusion
Source Files
Our Group

Hits
Hits
Conclusion

In doing this project, we faced many of the trials and tribulations associated with real time signal processing using a TI DSP

In doing this project, we faced many of the trials and tribulations associated with real time signal processing using a TI DSP Evaluation Module.  We encountered and dealt with various hardware issues including limited onboard memory and the finite number of instructions that can be executed between successive interrupts.  Our first straightforward implementation of the fft and ifft algorithms distorted the output signal, so we implemented the overlap-save algorithm in an attempt to eliminate this distortion; we were successful.  Thus, we have accomplished our goal – to develop a foundation on which others can use to design digital filters. 

 

Any comments or questions? Please email us at bessig@rice.edu or pecresap@rice.edu.
Last updated on December 16, 2000.