Project Description

Project Description 50 Word Description Functional Description Scoring Algorithm Pin Count Pin Map Interactive Floor Plan Old Block Diagrams Timing Diagrams FSM Timing Diagram Input Timing Diagram Logic Timing Diagram Output Timing Diagram FSM Design and MEG FSM State Table FSM Inputs and Outputs FSM Magic Layout FSM IRSIM Major Blocks & Subcells Logic Diagram Links Cell Hierarchy Magic and IRSIM Performance Analysis IRSIM Spice Summary About Us Mid-Semester Status Report

Functional Description 50 word description for MOSIS The chip design is based on the logic game Mastermind. In this version of the game, the Master enters a secret code of 4 pegs, each peg being one of 4 colors: red, yellow, green, and blue. The Guesser then attemps to crack the code in 7 guesses or less. The chip calculates the accuracy of the guess. A black peg is returned each time a guess peg is the correct color in the correct position. A white peg is returned each time a guess peg is the correct color but in the WRONG position. For example, an evaluation of 4 white pegs indicates that the Guesser has guessed all the correct colors, but they are in the wrong positions. A score of 4 black pegs indicates that the Guesser has won the game, or cracked the code!! Four colors are represented by 2 bits. Since there are 4 pegs in a code, the chip has 8 pins/bits to represent a code. The binary encoding of the colors is: red = 00, yellow = 01, green = 10, and blue = 11. The game allows the Guesser 7 attempts to crack the code. An incrementer keeps track of the number of guesses. Three output pins encode the number of guesses used so far in the game. For white peg scoring, the chip requires 3 output pins to represent 0 through 4. For black peg scoring, the chip requires 2 output pins to represent 0 through 3. Two additional pins describe the game state as either "keep guessing," "Guesser wins!," or "Guesser loses!". (The equivalent of a score of 4 black pegs is represented using these game state bits) A finite state machine mediates the entire game. Feedback, barrelshifters, and gates construct the logic that is used to compare the guess with the code. Based on the comparison results, a logic PLA returns the appropriate binary black/white peg score. A low score feature keeps track of the shortest game (the game with the fewest guesses utilized to crack the code). Return to top of page Scoring Algorithm The entered guess is scored against the secret key in a two-phase process. The first phase determines the number of black scoring pegs awarded for the guess. This is completed by a direct comparison of the guess and key. If there are any matches, both the guess and key pegs corresponding to the match are disabled, meaning that neither peg (guess nor key) will be considered in future comparisons. The number of direct matches is the number of black pegs displayed in the final score. The next phase determines the number of white scoring pegs awarded for the guess. To start this phase, the guess pegs are shifted by one peg with respect to the key. Again, a direct comparison is made. If there is a match between two ENABLED pegs, one white peg is added to the final white peg score. As before, both the guess and key pegs corresponding to the match are disabled. Then, the guess pegs are shifted by one peg again. The scoring steps in phase two are repeated. For the final step, the guess pegs are shifted by one last peg, followed by the same scoring steps. A total of three shifts are made on the guess pegs so that each guess peg is compared to each key peg. Code Description: int black_cnt = 0; //number of correctly placed pegs, scored with black pegs int white_cnt = 0; //number of correctly colored pegs but incorrectly //placed pegs, scored with white pegs boolean touched[] = new boolean[4]; //sets marks for each code peg //first, find correctly placed pegs for(int c=0;c<4;c++){ if (guess[c]==code[c]){ //a match touched[c]=true; black_cnt++; }else{ //initialize to "not yet marked" touched[c]=false; } } //second, find correctly colored but incorrectly placed pegs for(int c=0;c<4;c++){ if(guess[c]==code[c]) //direct hit continue; //walk through the code for(int g=0;g<4;g++){ if(!touched[g]&&code[g]==guess[c]{ //hit touched[g]=true; white_cnt++; break; //peg consumed (don't count twice) } } } Return to top of page Pin Count Total Pin Count: 40 Pin Map Pin Name Number of Pins Required Physical Pin Number Signal Type Description Vdd/GND 6 5, 10, 15, 25, 30, 35 Power Supplies power and ground to the chip CLKA 1 29 Input 2 phase clocking CLKB 1 11 Input 2 phase clocking RESTART 1 34 Input Signal for resetting the PLA KG[7:0] 8 17-24 Input Takes in 8-Bit "code", either guess or key LSReset 1 31 Input For resetting low score, can reset other logic enterK 1 37 Input Tells FSM when a "code" has been entered enterG 1 36 Input Tells FSM when a "guess" has been entered SB[3:0] 4 32, 33, 38, 39 Output Returns state information from FSM for debugging purposes results[7:0] 8 40, 1-4, 6-8 Output Multiplexed to return either: previous guess on CLKAbar or no. of black (B1g4, B2g5), no. of white (W0g0, W1g1, W2g2), no. of guesses (GC0g5, GC1g6, GC2g7) on CLKA LS[2:0] 3 26-28 Output Returns lowest score WLK1,WLK0 2 9, 12 Output Returns one of three signals: 1. Win (11), 2. Lose (01), 3. Keep Guessing(00) S[2:0] 3 13, 14, 16 Output For debugging purposes coming from the score latch Return to top of page