rone_api/roneos/hal__nrf__reg_8h_source.html

/* Copyright (c) 2006 Nordic Semiconductor. All Rights Reserved.

 *

 * The information contained herein is confidential property of Nordic Semiconductor. The use,

 * copying, transfer or disclosure of such information is prohibited except by express written

 * agreement with Nordic Semiconductor.

 *

 * $Rev: 1731 $

 *

 */


#ifndef HAL_NRF_REG_H__

#define HAL_NRF_REG_H__


/* nRF24L01 Instruction Definitions */

#define NRF_R_REGISTER                  0x00

#define NRF_W_REGISTER                  0x20

#define REGISTER_MASK 0x1F

#define NRF_R_RX_PAYLOAD                0x61

#define NRF_W_TX_PAYLOAD                0xA0

#define NRF_FLUSH_TX                    0xE1

#define NRF_FLUSH_RX                    0xE2

#define NRF_REUSE_TX_PL                 0xE3

#define NRF_R_RX_PAYLOAD_WID    0x60

#define NRF_W_ACK_PAYLOAD               0xA8

#define NRF_W_TX_PAYLOAD_NOACK  0xB0

#define NRF_NOP                         0xFF

#define NRF_LOCK_UNLOCK                 0x50


/* nRF24L01 * Register Definitions * */

#define NRF_CONFIG              0x00

#define NRF_EN_AA               0x01

#define NRF_EN_RXADDR           0x02

#define NRF_SETUP_AW            0x03

#define NRF_SETUP_RETR          0x04

#define NRF_RF_CH               0x05

#define NRF_RF_SETUP            0x06

#define NRF_STATUS              0x07

#define NRF_OBSERVE_TX          0x08

#define NRF_RPD                 0x09

#define NRF_RX_ADDR_P0          0x0A

#define NRF_RX_ADDR_P1          0x0B

#define NRF_RX_ADDR_P2          0x0C

#define NRF_RX_ADDR_P3          0x0D

#define NRF_RX_ADDR_P4          0x0E

#define NRF_RX_ADDR_P5          0x0F

#define NRF_TX_ADDR             0x10

#define NRF_RX_PW_P0            0x11

#define NRF_RX_PW_P1            0x12

#define NRF_RX_PW_P2            0x13

#define NRF_RX_PW_P3            0x14

#define NRF_RX_PW_P4            0x15

#define NRF_RX_PW_P5            0x16

#define NRF_FIFO_STATUS         0x17

#define NRF_DYNPD               0x1C

#define NRF_FEATURE             0x1D


//#define MASK_RX_DR  6

//#define MASK_TX_DS  5

//#define MASK_MAX_RT 4

//#define EN_CRC      3

//#define CRCO        2

//#define PWR_UP      1

//#define PRIM_RX     0

//#define ENAA_P5     5

//#define ENAA_P4     4

//#define ENAA_P3     3

//#define ENAA_P2     2

//#define ENAA_P1     1

//#define ENAA_P0     0

//#define ERX_P5      5

//#define ERX_P4      4

//#define ERX_P3      3

//#define ERX_P2      2

//#define ERX_P1      1

//#define ERX_P0      0

//#define AW          0

//#define ARD         4

//#define ARC         0

//#define PLL_LOCK    4

//#define RF_DR       3

//#define RF_PWR      1

//#define LNA_HCURR   0

//#define RX_DR       6

//#define TX_DS       5

//#define MAX_RT      4

//#define RX_P_NO     1

//#define TX_FULL     0

//#define PLOS_CNT    4

//#define ARC_CNT     0

//#define TX_REUSE    6

//#define FIFO_FULL   5

//#define TX_EMPTY    4

//#define RX_FULL     1

//#define RX_EMPTY    0


#define NRF_CONFIG_MASK_RX_DR    6

#define NRF_CONFIG_MASK_TX_DS    5

#define NRF_CONFIG_MASK_MAX_RT   4

#define NRF_CONFIG_EN_CRC        3

#define NRF_CONFIG_CRCO          2

#define NRF_CONFIG_PWR_UP        1

#define NRF_CONFIG_PRIM_RX       0


#define NRF_SETUP_PLL_LOCK      4

#define NRF_SETUP_RF_DR         3

#define NRF_SETUP_RF_PWR1       2

#define NRF_SETUP_RF_PWR0       1

#define NRF_SETUP_LNA_HCURR     0


/* STATUS 0x07 */

#define NRF_STATUS_RX_DR         6

#define NRF_STATUS_TX_DS         5

#define NRF_STATUS_MAX_RT        4

#define NRF_STATUS_TX_FULL       0


/* FIFO_STATUS 0x17 */

#define NRF_FIFOSTATUS_TX_REUSE      6

#define NRF_FIFOSTATUS_TX_FIFO_FULL  5

#define NRF_FIFOSTATUS_TX_EMPTY      4

#define NRF_FIFOSTATUS_RX_FULL       1

#define NRF_FIFOSTATUS_RX_EMPTY      0


#define NRF_ENAA_ENAA_P5     5

#define NRF_ENAA_ENAA_P4     4

#define NRF_ENAA_ENAA_P3     3

#define NRF_ENAA_ENAA_P2     2

#define NRF_ENAA_ENAA_P1     1

#define NRF_ENAA_ENAA_P0     0

#define NRF_DYNPD_DPL_P5      5

#define NRF_DYNPD_DPL_P4      4

#define NRF_DYNPD_DPL_P3      3

#define NRF_DYNPD_DPL_P2      2

#define NRF_DYNPD_DPL_P1      1

#define NRF_DYNPD_DPL_P0      0

#define NRF_FEATURE_EN_DPL      2

#define NRF_FEATURE_EN_ACK_PAY  1

#define NRF_FEATURE_EN_DYN_ACK  0

#endif // HAL_NRF_REG_H__