OUTLINE

THE BOMB!

1. FUNCTIONAL DESCRIPTION
2. ISSUES
3. INSTRUCTION SET SPECIFICATION
4. FLOOR PLAN
5. PLOT OF CHIP
   1. PLA
      1. FUNCTIONAL DESCRIPTION
      2. EXPLANATION OF I/O SIGNALS
      3. ISSUES
      4. INPUT TO MEG
   2. PC
      1. FUNCTIONAL DESCRIPTION
      2. REGISTER TRANSFER LEVEL DESCRIPTION
      3. GATE LEVEL DESCRIPTION
         1. INCREMENTER
         2. S-R LATCH
         3. MULTIPLEXER
         4. BIDIRECTIONAL BUS CONTROLLER
      4. SILICON LEVEL DESCRIPTION
      5. PC TIMING CIRCUITRY
   3. ALU
      1. FUNCTIONAL DESCRIPTION
      2. REGISTER TRANSFER LEVEL DESCRIPTION
      3. GATE LEVEL DESCRIPTION
         1. AND/OR UNIT
         2. ADD/SUB UNIT
         3. SHIFT LEFT/RIGHT UNIT
      4. ALU TIMING CIRCUITRY
      5. ISSUES
         1. ALU
         2. ADD/SUB UNIT
         3. SUBSTRATE CONNECTIONS
   4. PERFORMANCE ANALYSIS
      1. MAXIMUM CLOCK FREQUENCY
      2. CRYSTAL ANALYSIS
      3. SPICE ANALYSIS
   5. REFERENCES
   6. DIVISION OF WORK
   7. COMMENTS AND SUGGESTIONS ON CAD TOOLS